Q7-928 is a Qseven® Rel. 2.0 Compliant Module designed by SECO that offers top computational and graphical performances given by low-power consuming ARM architecture.
The board integrates i.MX6 Multimedia Applications platform from NXP, a multimedia processor integrating a multi-core Cortex® A9 ARM Core (up to Quad Core processors), ideal for applications requiring multimedia capabilities and/or high levels of parallel computing.
For hardware-related information, such as board's specific features, configurations, electrical interface and more, please refer to the product page (http://www.seco.com/prods/eu/category/qseven-boards/q7-928.html).
At this link you can find all the instruction to build the binaries and to flash them for every specific board configuration:
Previous versions available of Linux based BSPs for Seco-Q7-928:
|BSP||U-Boot Release||Kernel Release||Filesystems Release|
|BSP v5.0||U-Boot 2014.04||Kernel 3.14.28||Filesystems v5.0|
|BSP v6.0||U-Boot 2015.04||Kernel 4.1.15||Filesystems v6.0|
|BSP v7.0||U-Boot 2017.03||Kernel 4.9.88||Filesystems v7.0|
|BSP v8.0||U-Boot 2018.03||Kernel 4.14.78||Filesystems v8.0|
SECO™ Q7-928 are highly versatile in terms of boot media; this section focuses on these boot media and explains how to configure preferences and order. This versatility is achieved through a widely used bootloader, called uboot.
|eMMC||uSD||external SD||SPI Flash||USB||TFTP||NFS||SATA (Quad only)|
|Kernel (zImage + dtb)||Yes||Yes||Yes||No||Yes||Yes||Yes|
The logical function of the SSM system is as follows: when switching the power on to the module, the Embedded Controller reads its internal records for the configuration of the boot sequence and the first boot device and then passes the information to the CPLD. At this point, the CPLD drives the boot strap of the i.MX6 and then the Embedded Controller releases the reset of the i.MX 6 processor, which tries to load the bootloader from boot device 1 and executes it. If the boot loader has found a valid uboot, the i.MX 6 sends a feedback (boot validate signal) to the Embedded Controller to indicate that the boot was successful. If, instead, the bootloader run is invalid or if the boot device is empty, the Embedded Controller does not receive the boot validated, and then it passes the information regarding the next boot device to the CPLD.The CPLD drives the new boot strap of the i.MX 6 to change the boot device and the Embedded Controller resets the i.MX 6, which again tries to load and execute the bootloader. The cycle repeats itself until it finds a valid boot device with a bootloader or all boot devices have been scanned.
A logic flow is:
Some of the features supported by BSP in Q7-928 varies from the other i.MX6 modules. For the common features supported by BSP in all the i.MX6 modules, refer the page SECO i.MX6 Features Guide BSP 5.0 & SECO i.MX6 Features Guide BSP 6.0.The unique features and supported devices in BSP for Q7-928 is tabulated below.
|Touch Screen||input0||/||Must be enabled|
|SPI NOR||mtd0||okay||Support SST 25VF080B SPI NOR flash via ECSPI1|
|Audio AC'97||/||/||Supports VT1613 codec|
|Audio I2S||/||/||Supports SGTL5000 codec|
|PCIe||/||okay||Intel Gigabit CT network standard PCI-e x1 card
Atheros AR9281 WiFi miniPCI-e x1 card
|SDHC3||mmcblk0||okay||1bit/4bit/8bit for eMMC on-board.|
|SDHC1||mmcblk1||okay||1bit/4bit/8bit for MMC/SD external.|
|SDHC4||mmcblk2||okay||1bit/4bit for µSD on-board|
|I2C1||i2c0||okay||Used for Embedded controller interface.|
|I2C2||i2c1||okay||Used for EDID HDMI Monitor.|
|I2C3||i2c2||okay||Used for codec SGTL5000.|
|CAN1||can0||disabled||Must be enabled from dts|
|PWM OUT0||backlight||okay||Used for backlight control from Native i.MX6.|
|PWM OUT1||/||/||From cpld is available on Q7 Golden Fin Connector.|
|PWM_OUT2||/||/||From Native i.MX6 is available on Q7 Golden Fin Connector.|
|TIMER||/||/||TIMER_IN is directly managed by lattice cpld and makes available on Q7 Golden Fin Connector.|
|WIFI||/||/||Atheros AR9281 Wi-Fi miniPCI-e x1 card.|
|LPC BUS||/||/||LPC Bus implemented through LCMXO640 (Lattice cpld chip).The LPC Signals
LPC_AD[0÷3] , LPC_CLK , LPC_FRAME# , LPC_LDRQ# , SERIRQ are available
on Q7 Golden Fin Connector.
|SUOPERIO VIA LPC||/||/||SuperIO W83627DMG-P with support for 2 UART RX/TX and a GPIO expander x8 I/O.
SuperIO EXAR XR28V382.
|/||/||Support for in/out GPIO expander x8 I/O via CPLD.
Management of the GPIO interrupts.
|PCA9655 I2C IO EXTENDER||/||/||16bit-I/O Expander,It Extends upto 16 Input or Output GPIO's|
Above the list of alvaible GPIO from Q7 connector of μQ7-962 board.
|Q7 PIN NO||IMX6 PAD||MUX MODE||GPIO VIRTUAL NUMBER|
The available carrier board is the Qseven® Carrier Board CQ7-A42, this is a full featured carrier board for Qseven® Rel. 2.0 compliant CPU modules, in 3.5” form factor.
The SECOCQ7-3.5 has been developed most of all as a development board to explore the possibilities offered by Qseven® modules, but it could also be a good solution for low volumes production for companies that do not want or need to develop customized carrier board.
For more information about carrier board specification CQ7-A42